Shows / Condor Currents
Condor Currents
Condor Currents delivers concise breakdowns of the latest computer architecture research and RISC-V developments. Each episode covers recent arXiv papers on data prefetching, branch prediction, and microarchitecture innovations, plus news from the open silicon community. Brought to you by Condor Computing, high-performance RISC-V processor IP from Andes Technology.
Episodes
- Condor Currents
MCF: A Memory- and Communication-Aware Co-Designed Framework for Long-Context LLM Inference
## Episode Summary In this episode, we cover: - **MCF: A Memory- and Communication-Aware Co-Designed Framework for Long-Context LLM Inference** (arXiv) -…
- Condor Currents
DeepInfer-Mac: Running a 750B-Class MoE on a 24 GB Laptop
## Episode Summary In this episode, we cover: - **DeepInfer-Mac: Running a 750B-Class MoE on a 24 GB Laptop** (arXiv) - **SPARTA: A Sparse Ternary LLM…
- Condor Currents
Toward Open ISA Supercomputing: A Comparative Study of RISC-V, Arm, and x86 Architectures on HPC Workloads
## Episode Summary In this episode, we cover: - **Toward Open ISA Supercomputing: A Comparative Study of RISC-V, Arm, and x86 Architectures on HPC Workloads**…
- Condor Currents
Toward Open ISA Supercomputing: A Comparative Study of RISC-V, Arm, and x86 Architectures on HPC Workloads
## Episode Summary In this episode, we cover: - **Toward Open ISA Supercomputing: A Comparative Study of RISC-V, Arm, and x86 Architectures on HPC Workloads**…
- Condor Currents
panvram: GPU-resident random access to a human pangenome cohort
## Episode Summary In this episode, we cover: - **panvram: GPU-resident random access to a human pangenome cohort** (arXiv) - **BS-Spec: BFP-Based Bit-Sharing…
- Condor Currents
Proba: A High-Performance, Low-Traffic Probabilistic Spatial Memory Streaming Prefetcher
## Episode Summary In this episode, we cover: - **Proba: A High-Performance, Low-Traffic Probabilistic Spatial Memory Streaming Prefetcher** (arXiv) - **Stop…
- Condor Currents
SnakeCharmer: Orchestrating Utility, Timeliness, and Placement in GPU Prefetching
## Episode Summary In this episode, we cover: - **SnakeCharmer: Orchestrating Utility, Timeliness, and Placement in GPU Prefetching** (arXiv) - **Reorienting…
- Condor Currents
HAWK: Heterogeneity-Aware KV Cache Transfer for Efficient GPU-NPU Phase-Disaggregated LLM Inference
## Episode Summary In this episode, we cover: - **HAWK: Heterogeneity-Aware KV Cache Transfer for Efficient GPU-NPU Phase-Disaggregated LLM Inference** (arXiv)…
- Condor Currents
PAGE404: Breaking GPU Isolation Through Hardware-assisted Page Migration
## Episode Summary In this episode, we cover: - **PAGE404: Breaking GPU Isolation Through Hardware-assisted Page Migration** (arXiv) - **MemLLM: End-to-end…
- Condor Currents
HBFSim: A Simulator for Exploring HBF in Memory Hierarchies for LLMs
## Episode Summary In this episode, we cover: - **HBFSim: A Simulator for Exploring HBF in Memory Hierarchies for LLMs** (arXiv) - **A Hybrid GPU and…
- Condor Currents
Checking In On The ISA Wars And Its Impact On CPU Architectures - Hackaday
## Episode Summary In this episode, we cover: - **Checking In On The ISA Wars And Its Impact On CPU Architectures - Hackaday** (google_arch) - **RISC-V vs ARM…
- Condor Currents
FORGE: Procedural Weight Generation for Sparse MoE Inference
## Episode Summary In this episode, we cover: - **FORGE: Procedural Weight Generation for Sparse MoE Inference** (arXiv) - **AlignPred: Error-Controlled KV…
- Condor Currents
Foundations of Hardware-Software Leakage Contracts
## Episode Summary In this episode, we cover: - **Foundations of Hardware-Software Leakage Contracts** (arXiv) - **PAGE404: Breaking GPU Isolation Through…
- Condor Currents
Top-Down Microarchitecture Analysis Without Causal Modelling Is Dangerous!
## Episode Summary In this episode, we cover: - **Top-Down Microarchitecture Analysis Without Causal Modelling Is Dangerous!** (arXiv) - **Minimum RISC-V…
- Condor Currents
TALU: A Reconfigurable Tiled-ALU Grid for RISC-V
## Episode Summary In this episode, we cover: - **TALU: A Reconfigurable Tiled-ALU Grid for RISC-V** (arXiv) - **CacheSmith: Accurate RAG Serving under Latency…
- Condor Currents
Programmable Data Layouts via On-The-Fly Data Transformation
## Episode Summary In this episode, we cover: - **Programmable Data Layouts via On-The-Fly Data Transformation** (arXiv) - **Simulate Before You Scale…
- Condor Currents
Read What Matters: Query-Adaptive Quantization for KV Caches
## Episode Summary In this episode, we cover: - **Read What Matters: Query-Adaptive Quantization for KV Caches** (arXiv) - **A Pipelined FPGA Architecture for…
- Condor Currents
CacheFlex: Direct Software-Managed Access to Higher-Level Cache for Scalable Vector Support
## Episode Summary In this episode, we cover: - **CacheFlex: Direct Software-Managed Access to Higher-Level Cache for Scalable Vector Support** (arXiv) -…
- Condor Currents
A Framework for Accelerating Transformer Inference on RISC-V for Edge AI
## Episode Summary In this episode, we cover: - **A Framework for Accelerating Transformer Inference on RISC-V for Edge AI** (arXiv) - **ECO: Energy-Oriented…
- Condor Currents
SUSpMV: A High Frequency Sparse Matrix Vector Multiplier on HBM Enabled FPGA written in SUS
## Episode Summary In this episode, we cover: - **SUSpMV: A High Frequency Sparse Matrix Vector Multiplier on HBM Enabled FPGA written in SUS** (arXiv) -…
- Condor Currents
CacheFit: The Rising Cost of Cache Replacement and Constraint-Driven Redesign of Last-Level Cache Replacement Policies
## Episode Summary In this episode, we cover: - **CacheFit: The Rising Cost of Cache Replacement and Constraint-Driven Redesign of Last-Level Cache Replacement…
- Condor Currents
CHiRP: Control-Flow History Reuse Prediction
## Episode Summary In this episode, we cover: - **CHiRP: Control-Flow History Reuse Prediction** (arXiv) - **SVRF: Efficient Register Storage for Long-Vector…
- Condor Currents
Trail: Scalable and Low-Cost Temporal TLB Prefetching via Page-Table-Embedded Deltas
## Episode Summary In this episode, we cover: - **Trail: Scalable and Low-Cost Temporal TLB Prefetching via Page-Table-Embedded Deltas** (arXiv) -…
- Condor Currents
Characterizing High Bandwidth Flash for LLM Serving
## Episode Summary In this episode, we cover: - **Characterizing High Bandwidth Flash for LLM Serving** (arXiv) - **Request Order Matters: Cache-History…
- Condor Currents
ServeTwin: A Benchmark-Validated Simulator for Distributed LLM Architecture Exploration
## Episode Summary In this episode, we cover: - **ServeTwin: A Benchmark-Validated Simulator for Distributed LLM Architecture Exploration** (arXiv) -…
- Condor Currents
Where Activation Sparsity and KV-Cache Sparsity Cross in LLM Decoding
## Episode Summary In this episode, we cover: - **Where Activation Sparsity and KV-Cache Sparsity Cross in LLM Decoding** (arXiv) - **U-Sonic: An Open-Source…
- Condor Currents
Efficient Linkage-Based Compartmentalization on CHERI
## Episode Summary In this episode, we cover: - **Efficient Linkage-Based Compartmentalization on CHERI** (arXiv) - **SPIMOE: Exploiting Hybrid Sparsity for…
- Condor Currents
Characterizing High Bandwidth Flash for LLM Serving
## Episode Summary In this episode, we cover: - **Characterizing High Bandwidth Flash for LLM Serving** (arXiv) - **STELLA: A 16nm Spatio-Temporal Elastic…
- Condor Currents
Cache-Aware Conv3D Lowering Across Embedded World-Model Decoders
## Episode Summary In this episode, we cover: - **Cache-Aware Conv3D Lowering Across Embedded World-Model Decoders** (arXiv) - **DPS: Dual-Mode Precision LLM…
- Condor Currents
Bandwidth, Not FLOPS: FFT Kernels, Matrix Units and SAR Imaging on Apple M6
## Episode Summary In this episode, we cover: - **Bandwidth, Not FLOPS: FFT Kernels, Matrix Units and SAR Imaging on Apple M6** (arXiv) - **Improving Indirect…
- Condor Currents
QuMA: Researchers Develop Quantum Microarchitecture that "Bridges the Gap" in Processor System Stacks - IEEE Computer Society
## Episode Summary In this episode, we cover: - **QuMA: Researchers Develop Quantum Microarchitecture that "Bridges the Gap" in Processor System Stacks - IEEE…
- Condor Currents
The KV Cache Is the New Memory Wall
## Episode Summary In this episode, we cover: - **The KV Cache Is the New Memory Wall** (arXiv) - **PipeDRAM: A Data-Transposition-Free In-DRAM Architecture…
- Condor Currents
HeteroReason: Heterogeneous FPGA-GPU Acceleration for Disaggregated Speculative Reasoning
## Episode Summary In this episode, we cover: - **HeteroReason: Heterogeneous FPGA-GPU Acceleration for Disaggregated Speculative Reasoning** (arXiv) - **SARA…
- Condor Currents
Exploiting Decompression Latency for Covert Channels in Inter-Line-Compressed LLCs
## Episode Summary In this episode, we cover: - **Exploiting Decompression Latency for Covert Channels in Inter-Line-Compressed LLCs** (arXiv) - **Paging the…
- Condor Currents
Bridging LLM Serving and CXL-SSDs with Chunk-Aware KV Cache Management
## Episode Summary In this episode, we cover: - **Bridging LLM Serving and CXL-SSDs with Chunk-Aware KV Cache Management** (arXiv) - **HBF-Sim: An Extensible…
- Condor Currents
PrefixBench-H100: Characterizing Prefix Reuse and Time-to-First-Token in H100 LLM Serving
## Episode Summary In this episode, we cover: - **PrefixBench-H100: Characterizing Prefix Reuse and Time-to-First-Token in H100 LLM Serving** (arXiv) -…
- Condor Currents
RISC-V and machine learning: a survey
## Episode Summary In this episode, we cover: - **RISC-V and machine learning: a survey** (arXiv) - **MeshKV: A Network-on-Chip KV Cache Fabric for Scalable…
- Condor Currents
Quantifying the Effect of HCLs on a Fixed-Microarchitecture MXFP4 Accelerator
## Episode Summary In this episode, we cover: - **Quantifying the Effect of HCLs on a Fixed-Microarchitecture MXFP4 Accelerator** (arXiv) - **HBFlex: A…
- Condor Currents
The World Model Hardware Accelerator
## Episode Summary In this episode, we cover: - **The World Model Hardware Accelerator** (arXiv) - **A 25-$μ$s/inf Event-driven Graph Neural Network Processor…
- Condor Currents
BOOST: Concurrent Access to Host Memory and HBM to Accelerate LLM Inference
## Episode Summary In this episode, we cover: - **BOOST: Concurrent Access to Host Memory and HBM to Accelerate LLM Inference** (arXiv) - **Arborist…
- Condor Currents
India unveils a homegrown dual-core 1GHz RISC-V processor, the DHRUV64 - theregister.com
## Episode Summary In this episode, we cover: - **India unveils a homegrown dual-core 1GHz RISC-V processor, the DHRUV64 - theregister.com** (google_riscv) -…
- Condor Currents
Enabling High-Bandwidth Flash for Generative Recommendation Serving with Write-Aware KV Cache Policy
## Episode Summary In this episode, we cover: - **Enabling High-Bandwidth Flash for Generative Recommendation Serving with Write-Aware KV Cache Policy**…
- Condor Currents
HermiCache: Enclave-Aware Cache Replacement for Trusted Execution Environments
## Episode Summary In this episode, we cover: - **HermiCache: Enclave-Aware Cache Replacement for Trusted Execution Environments** (arXiv) - **Fengshui…
- Condor Currents
Performance aware shared memory hierarchy model for multicore processors - nature.com
## Episode Summary In this episode, we cover: - **Performance aware shared memory hierarchy model for multicore processors - nature.com** (google_arch) -…
- Condor Currents
RAGMark: A Comprehensive Framework for Benchmarking Retrieval-Augmented Generation Systems
## Episode Summary In this episode, we cover: - **RAGMark: A Comprehensive Framework for Benchmarking Retrieval-Augmented Generation Systems** (arXiv) -…
- Condor Currents
GreenPipe: Power Modeling for Containerized DNN Inference on Kubernetes Edge Nodes
## Episode Summary In this episode, we cover: - **GreenPipe: Power Modeling for Containerized DNN Inference on Kubernetes Edge Nodes** (arXiv) - **A…
- Condor Currents
Confidence-Gated Admission for Hardware Prefetching: When the Gate Matters More Than the Predictor
## Episode Summary In this episode, we cover: - **Confidence-Gated Admission for Hardware Prefetching: When the Gate Matters More Than the Predictor** (arXiv)…
- Condor Currents
A single-precision floating-point systolic Givens-QRD Triangular Solver for MVDR Beamforming
## Episode Summary In this episode, we cover: - **A single-precision floating-point systolic Givens-QRD Triangular Solver for MVDR Beamforming** (arXiv) -…
- Condor Currents
Confidence-Gated Admission for Hardware Prefetching: When the Gate Matters More Than the Predictor
## Episode Summary In this episode, we cover: - **Confidence-Gated Admission for Hardware Prefetching: When the Gate Matters More Than the Predictor** (arXiv)…
- Condor Currents
The key CPU architecture you've never heard of: RISC-V - redsharknews.com
## Episode Summary In this episode, we cover: - **The key CPU architecture you've never heard of: RISC-V - redsharknews.com** (google_arch) - **Checking In On…
- Condor Currents
SchedBlame: Who Ran While You Waited? Culprit-Attributed CPU Contention for Containers on Stock Kernels
## Episode Summary In this episode, we cover: - **SchedBlame: Who Ran While You Waited? Culprit-Attributed CPU Contention for Containers on Stock Kernels**…
- Condor Currents
Performance Characterization of SPEC CPU 2026 on AMD EPYC 9755 Processor
## Episode Summary In this episode, we cover: - **Performance Characterization of SPEC CPU 2026 on AMD EPYC 9755 Processor** (arXiv) - **Hardware Acceleration…
- Condor Currents
CHIPSMORE: Compute-in-Interconnect and -Memory Chiplets for Multi-Mode Multi-Request LLM Inference Acceleration
## Episode Summary In this episode, we cover: - **CHIPSMORE: Compute-in-Interconnect and -Memory Chiplets for Multi-Mode Multi-Request LLM Inference…
- Condor Currents
Great Expectations: Benchmarking the Real-World Performance of RVV 1.0 in HPC
## Episode Summary In this episode, we cover: - **Great Expectations: Benchmarking the Real-World Performance of RVV 1.0 in HPC** (arXiv) - **AI Hardware…
- Condor Currents
NOVA: Technology-Architecture Co-Design of Near-Memory Processing for Attention-SSM-MoE Hybrid LLM Inference
## Episode Summary In this episode, we cover: - **NOVA: Technology-Architecture Co-Design of Near-Memory Processing for Attention-SSM-MoE Hybrid LLM…
- Condor Currents
SILK: Closing the Time-of-Check-to-Time-of-Use Gap in RoT-Protected AI Systems
## Episode Summary In this episode, we cover: - **SILK: Closing the Time-of-Check-to-Time-of-Use Gap in RoT-Protected AI Systems** (arXiv) - **Simthesizer: An…
- Condor Currents
PRO-RAN: Processor-Level Characterization of Open RAN Centralized and Distributed Units
## Episode Summary In this episode, we cover: - **PRO-RAN: Processor-Level Characterization of Open RAN Centralized and Distributed Units** (arXiv) -…
- Condor Currents
FLINT: Efficiently Leveraging High Bandwidth Flash for Capacity-Scalable LLM Inference Acceleration
## Episode Summary In this episode, we cover: - **FLINT: Efficiently Leveraging High Bandwidth Flash for Capacity-Scalable LLM Inference Acceleration** (arXiv)…
- Condor Currents
Pipeline-Native Transformers: Co-Designing Model Architecture and CPU Inference for Bandwidth-Efficient Autoregressive Decode
## Episode Summary In this episode, we cover: - **Pipeline-Native Transformers: Co-Designing Model Architecture and CPU Inference for Bandwidth-Efficient…
- Condor Currents
Architecting the Next Generation of Asynchronous, Distributed GPUs for the AI Era
## Episode Summary In this episode, we cover: - **Architecting the Next Generation of Asynchronous, Distributed GPUs for the AI Era** (arXiv) - **TreeWY…