Branch Prediction, Speculative Execution, and Microarchitectural Side Channels: Two-Level Adaptive Predictors, TAGE, BTB, Return Stack Buffers, Spectre, and Meltdown

Deep End Era. Engineering with Sankalp · Oct 29, 2026 · 1h 8m

Every five or six instructions in a general-purpose program is a branch, yet an eight-wide out-of-order CPU has five hundred instructions in flight at once—spanning over eighty unresolved branches simultaneously. We trace the mathematics of hardware branch prediction from two-bit saturating counters and Yeh-Patt history registers to André Seznec's TAGE geometric-history predictor, and unpack the physics of Spectre and Meltdown.

Chapters

00:00:00 Opening: Eighty Forks in the Road Before You Know the First Answer

00:04:56 Two Questions Every Cycle: Direction Prediction Versus Target Prediction…